| Tutorial | Name | Last Updated | PIC16C62X Features |
| Tutorial 1: | PortB Counter 'Smoke Test' | TRISB,PORTB | |
| Tutorial 2: | Timer0 Timer mode |
TRISB,PORTB,Timer0 Timer Mode |
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| Tutorial 3: | Timer0 Counter mode rising T0CKI no prescalar |
TRISB,PORTB,Timer0 Counter Mode,T0CKI Rising Edge |
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| Tutorial 4: | Timer0 Counter Mode, falling T0CKI with Prescalar |
TRISA,PORTA,TRISB,PORTB,Timer0 Counter Mode,T0CKI Falling Edge |
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| Tutorial 5: | Watchdog Timeout and Wakeup from sleep |
TRISA,PORTA,TRISB,PORTB,Watchdog Timer,Watchdog Timer Prescalar,Watchdog Timer reset on timeout,Watchdog Timer wakeup from sleep |
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| Tutorial 6: | Reset |
TRISB,PORTB,Reset Vector,MCLR wakeup from sleep,Power on reset,MCLR reset |
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| Tutorial 7: | Register Banking |
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| Tutorial 8: | External Wakeup on INTB0 |
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| Tutorial 9: | Aysnchronous USART echo |
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| Tutorial 10: | Using 16Bit Timer1 as 8Bit Timer |
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| Tutorial 11: | Pulse Width Modulation |
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Tutorial |
1 | 2 | 3 | 4 | 5 | 6 | 7 |
| PORTS | |||||||
| TRIS/PORTA |
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| TRIS/PORTB |
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| Timer0 | |||||||
| Timer mode |
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| Counter mode |
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| T0CKI Rising Edge |
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| T0CKI Falling Edge |
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| Prescalor |
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| Watch Dog Timer | |||||||
| Prescalor |
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| reset on timeout |
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| wakeup from sleep |
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| Reset | |||||||
| Watchdog Reset on timeout |
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| Watchdog wakeup from sleep |
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| Master Reset |
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| Reset Vector |
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| Wakeup from Sleep on MCLR reset |
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| MCLR Reset |
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| Power on Reset |
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| Paging and Banking | |||||||
| Long Call | |||||||
| Program Paging | |||||||
| Register Banking |
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| Register Mapping |
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| Indirect Register Access to Register Banks |
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