CCP Modules are configured as 16 bit one shot timers, the 16Bit value is on PortB,PortC, such that when triggered by an interrupt on PortB Interrupt pin CPP1/2 output a 16bit one-shot timed pulse. CCP1 is activated on the rising edge of PINB0, CCP2 is activated on the falling edge of PinB0.
Description
Both capture modules are used, CCP1 is configured to detect the rising edge which marks the beginning of the period. CCP2 is configured to detected the falling edge which marks the end of duty cycle.
| Filename | Version | Description |
| tut16.pjt | 1.0 | MPLAB Project |
| tut16.asm | 1.0 | PIC16F877 Assembler code |
| tut16.hex | 1.0 | Precompiled HEX |
| tut16.lst | 1.0 | Precompiled LST |
| tut16.vbb | 1.0 | Virtual Breadboard simulation |
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CCP1 Compare |
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CCP2 Compate |
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INTB0 Rising Edge Detect |
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INTB1 Falling Edge Detect |