The watchdog timer is a an onboard timer which when it overflows will cause the processor to reset. The watchdog timer is configured as enabled or disabled in the properties of the PICMICRO. The Watch Dog Timer needs to be enabled because by default it is disabled. In this tutorial, both modes of WatchDog timer are demonstrated. When first run, the powerUp reset will set the /PD Powerdown STATUS<3> bit. This causes PORTB to be set, the watchdog timer is then configured without a prescalar and the processor falls asleep. After 18 milliseconds of simulated real-time (which can take several seconds of real real time) the processor(s) wake up. This time because a wakeup from sleep has occured the /PD Powerdown STATUS<3> bit is cleared. This is detected and a port incrementor routine starts which increments PORTB every millisecond. When entering the incrementor routine the Watchdog timer is configured to use a 1:2 prescalor. Thus after 36 milliseconds of simulated real time the watch dog timer times out causing a reset. When a reset occurs due to a watchdog timeout in normal operation the /PD Powerdown STATUS<3> bit is set which causes the sleep routine to be called restarting the loop.
| Filename | Version | Description |
| tut5.pjt | 1.0 | MPLAB Project |
| tut5.asm | 1.0 | PIC12C5XX Assembler code |
| tut5.hex | 1.0 | Precompiled HEX |
| tut5.lst | 1.0 | Precompiled LST |
| tut5.vbb | 1.0 | Virtual Breadboard simulation |
Open tut5.vbb and press RUN.
TRIS/GPIO
Watchdog Timer
Watchdog Timer Prescalar
Watchdog Timer reset on timeout
Watchdog Timer wakeup from sleep
Components Used