Tutorial 3: Timer0 Counter mode

In Timer0 mode counter mode, the TMR0 register increments on either a rising or falling edge of a clock cycle. This tutorial demonstrates the use of Counter Mode, with no prescalar incrementing on the rising edge of an external clock generated by a 555 Timer.

Download FEATURE7X_Tutorial3.zip and unzip into folder <your path>\Tutorial 3

Filename Version Description
tut3.pjt 1.0 MPLAB Project
tut3.asm 1.0 Assembler code
tut3.hex 1.0 Precompiled HEX
tut3.lst 1.0 Precompiled LST
tut3.vbb 1.0 Virtual Breadboard simulation

Running the Simulation

Open tut3.vbb and press RUN.

Code Walk Through

Features Demonstrated

TRISB/PORTB

TIMER0 Counter Mode Rising T0KI Edge

Components Used

PIC16C71

PIC16C715

LED8

555 TIMER

NET LABEL